🚀 TVM Reverse-Engineering Portfolio

Welcome to my deep-dive journey into Apache TVM.

🎯 Ultimate Goal

The purpose of this project is not just to use TVM, but to dismantle and understand it from the inside out. As a junior engineer aiming for elite expertise, I am taking a "Top-Down Reverse Engineering" approach. The goal is to prove that I can navigate complex, massive C++ AI compiler codebases, understand the bridging between Python and C++, and pinpoint low-level hardware optimizations.

🗺️ The 3-Step Reverse Engineering Roadmap

Step 0: The Foundation (Completed)

• Clone TVM and build it from source (handling C++ CMake and Python FFI module complexities).
• Environment requirements are frozen in requirements.txt. Make sure to run pip install -r requirements.txt.
• See Journal 01 and Journal 02.

Step 1: The Big Picture via Relax (Completed)

• Used the modern tvm.relax Python API to compile a simple PyTorch/ONNX model into a native .so library.
• See Journal 03.

Step 2: Python Frontend Tracing (Completed)

• Dive into python/tvm/relax or relay.
• Objective: Trace how familiar Python operations (e.g., Conv2d) are ingested into TVM's internal graph nodes.
• See Journal 04: Python Frontend Code Tracing.
• See Note 02: Frontend Parsing and AST.

Step 3: Crossing the Boundary (FFI & PackedFunc) (Completed)

• Explore how TVM transitions from Python to C++ with zero serialization overhead.
• Objective: Master the PackedFunc mechanism to understand how heavy lifting is instantly delegated to C++.
• See Journal 05: FFI Boundary Tracking.
• See Note 03: Serialization vs Zero-Copy (FFI).

Step 4A: C++ Core & TensorIR - Operator Fusion

• Zoom in on src/relax/transform.
• Objective: Trace graph-level pattern matching (fuse_ops.cc) and dig all the way down to TensorIR instruction generation (fuse_tir.cc).

Step 4B: C++ Core & TensorIR - Tiling

• Zoom in on src/tir/transforms.
• Objective: Dissect loop transformations and cache memory access optimization (Tiling).

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